<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>CUDA | Zerui "Jerry" Ma's personal website</title><link>https://jerma88.github.io/tags/cuda/</link><atom:link href="https://jerma88.github.io/tags/cuda/index.xml" rel="self" type="application/rss+xml"/><description>CUDA</description><generator>Hugo Blox Builder (https://hugoblox.com)</generator><language>en-us</language><lastBuildDate>Fri, 15 May 2026 00:00:00 +0000</lastBuildDate><image><url>https://jerma88.github.io/media/icon_hu_982c5d63a71b2961.png</url><title>CUDA</title><link>https://jerma88.github.io/tags/cuda/</link></image><item><title>GPU-Accelerated Quantum Error Detection</title><link>https://jerma88.github.io/project/quantum-error-detection/</link><pubDate>Fri, 15 May 2026 00:00:00 +0000</pubDate><guid>https://jerma88.github.io/project/quantum-error-detection/</guid><description>&lt;h1 id="gpu-accelerated-quantum-error-detection">GPU-Accelerated Quantum Error Detection&lt;/h1>
&lt;h2 id="overview">Overview&lt;/h2>
&lt;p>As quantum processors scale into the Noisy Intermediate-Scale Quantum (NISQ) era, characterization and mitigation of gate errors are essential for achieving fault-tolerant quantum computation. This research project presents a high-throughput, GPU-accelerated quantum simulation pipeline that accurately models stochastic Pauli error channels using NVIDIA &lt;strong>cuQuantum&lt;/strong> tensor-network backends and &lt;strong>Qiskit&lt;/strong>.&lt;/p>
&lt;div class="mermaid">flowchart TD
Q[Parameterized Quantum Circuit\n+ Noise Channels] --> T[cuQuantum Tensor Network\nStatevector Simulation]
T --> G[GPU Accelerated Contraction\nNVIDIA Tensor Cores]
G --> S[Statistical Sampling Algorithm\nSyndrome Measurement]
S --> E[Single- &amp; Two-Qubit\nGate Error Isolation]
E --> V[QEC Verification &amp; Mitigation]
&lt;/div>
&lt;h2 id="research--engineering-highlights">Research &amp;amp; Engineering Highlights&lt;/h2>
&lt;h3 id="1-high-performance-tensor-network-simulation">1. High-Performance Tensor-Network Simulation&lt;/h3>
&lt;ul>
&lt;li>Modeled realistic quantum noise using stochastic Pauli channels ($X, Y, Z$ depolarizing noise) integrated into multi-qubit parameterized quantum circuits.&lt;/li>
&lt;li>Accelerated statevector generation and tensor contractions leveraging NVIDIA &lt;strong>cuQuantum Appliance&lt;/strong> and custom CUDA routines, achieving order-of-magnitude speedups over classical CPU simulator backends.&lt;/li>
&lt;/ul>
&lt;h3 id="2-statistical-error-syndrome-sampling">2. Statistical Error Syndrome Sampling&lt;/h3>
&lt;ul>
&lt;li>Developed a statistical sampling algorithm capable of localizing single-qubit and two-qubit entangling gate errors with minimal measurement overhead.&lt;/li>
&lt;li>Reduced the syndrome extraction rounds required to verify circuit fidelity under high-depth algorithmic circuits.&lt;/li>
&lt;/ul>
&lt;h3 id="3-scalable-qec-verification">3. Scalable QEC Verification&lt;/h3>
&lt;ul>
&lt;li>Currently drafting a journal publication formalizing this methodology as an efficient verification protocol for Quantum Error Correction (QEC) schemes on near-term hardware.&lt;/li>
&lt;/ul>
&lt;h2 id="publication-status">Publication Status&lt;/h2>
&lt;ul>
&lt;li>&lt;strong>Scalable Quantum Error Detection via Tensor-Network Statevector Sampling&lt;/strong> (2026). &lt;em>In Preparation for Journal Submission&lt;/em>. Primary Author: Zerui &amp;ldquo;Jerry&amp;rdquo; Ma.&lt;/li>
&lt;/ul></description></item><item><title>High-Fidelity AI Video Generation Engine (LTX-2.5)</title><link>https://jerma88.github.io/project/video-generation-engine/</link><pubDate>Sun, 01 Mar 2026 00:00:00 +0000</pubDate><guid>https://jerma88.github.io/project/video-generation-engine/</guid><description>&lt;h1 id="high-fidelity-ai-video-generation-engine-ltx-25">High-Fidelity AI Video Generation Engine (LTX-2.5)&lt;/h1>
&lt;h2 id="overview">Overview&lt;/h2>
&lt;p>Engineered an ultra-low-latency, memory-efficient video generation pipeline leveraging the &lt;strong>LTX-2.5 Diffusion Transformer (DiT)&lt;/strong> architecture on a consumer &lt;strong>NVIDIA GeForce RTX 5080 GPU (Blackwell architecture)&lt;/strong>. By synthesizing custom low-precision quantized GEMM kernels and an asynchronous layer-wise weight offloading subsystem, this engine delivers high-resolution, multi-frame video synthesis within a 16GB VRAM budget.&lt;/p>
&lt;div class="mermaid">flowchart LR
A[Host System RAM\nPinned Memory] &lt;-->|Async DMA Stream\nLayer-wise Weights| B[NVIDIA RTX 5080\n16GB GDDR7]
subgraph GPU Computation
B --> C[Custom NVFP4 GEMM Kernels\nDynamic FP4/FP8 Casting]
C --> D[Spatio-Temporal DiT Layers\nFlashAttention + CUDA Graphs]
D --> E[Latent Frame Synthesis]
end
E --> F[High-Fidelity Video Output]
&lt;/div>
&lt;h2 id="technical-architectural-innovations">Technical Architectural Innovations&lt;/h2>
&lt;h3 id="1-custom-nvfp4-quantized-gemm-compilation">1. Custom NVFP4 Quantized GEMM Compilation&lt;/h3>
&lt;ul>
&lt;li>Designed and compiled custom &lt;strong>NVFP4 (NVIDIA 4-bit Floating Point)&lt;/strong> quantized GEMM kernels utilizing Blackwell tensor cores.&lt;/li>
&lt;li>Implemented robust dynamic FP4/FP8 casting with adaptive block-level scale-factor management, maintaining numerical stability across extreme gradient dynamics.&lt;/li>
&lt;li>Achieved a &lt;strong>65% reduction in model memory footprint&lt;/strong> with negligible visual fidelity degradation compared to standard FP16/BF16 baselines.&lt;/li>
&lt;/ul>
&lt;h3 id="2-asynchronous-pinned-memory-layer-wise-offloading">2. Asynchronous Pinned-Memory Layer-wise Offloading&lt;/h3>
&lt;ul>
&lt;li>Architected an asynchronous double-buffered weight streaming engine that exploits high-bandwidth PCIe Gen 5 DMA transfers.&lt;/li>
&lt;li>Streams individual DiT transformer blocks into VRAM concurrently with the forward-pass computation of preceding layers, completely hiding memory transfer latency.&lt;/li>
&lt;li>Enabled continuous multi-frame 1080p video generation within consumer 16GB VRAM, eliminating out-of-memory (OOM) exceptions.&lt;/li>
&lt;/ul>
&lt;h3 id="3-flashattention--cuda-graph-optimization">3. FlashAttention &amp;amp; CUDA Graph Optimization&lt;/h3>
&lt;ul>
&lt;li>Integrated fused FlashAttention kernels tailored for 3D spatio-temporal attention matrices.&lt;/li>
&lt;li>Captured static execution branches into CUDA Graphs, eradicating CPU-GPU launch overhead and cutting end-to-end inference latency by &lt;strong>42%&lt;/strong>.&lt;/li>
&lt;/ul>
&lt;h2 id="key-results--benchmarks">Key Results &amp;amp; Benchmarks&lt;/h2>
&lt;ul>
&lt;li>&lt;strong>Memory Footprint&lt;/strong>: Reduced from ~42 GB (BF16 unquantized) to &amp;lt;14.8 GB active VRAM.&lt;/li>
&lt;li>&lt;strong>Latency Acceleration&lt;/strong>: 42% end-to-end speedup over native PyTorch baseline implementations.&lt;/li>
&lt;li>&lt;strong>Visual Quality&lt;/strong>: Retained smooth temporal coherence and high perceptual score across complex multi-object video generations.&lt;/li>
&lt;/ul></description></item></channel></rss>